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 L6451
28 CHANNEL INK JET DRIVER
ADVANCE DATA
40V DMOS OUTPUT BREAKDOWN PRECISE OUTPUT ENERGY ESD OUTPUT PROTECTION WITH CLAMPING DIODES VERY LOW QUIESCENT CURRENT PLCC44 OR PQFP44 (10 x 10mm)
MULTIPOWER BCD TECHNOLOGY
DESCRIPTION The L6451 is realized in Multipower BCD Technology which combines isolated DMOS power transistors with CMOS and Bipolar circuits on the same IC. By using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performances. Intended to be used in ink jet Printer Applications as 4 to 28 (2 x 14) lines selectable decoder/driver, the L6451 device driver has the advantages of low power CMOS inputs and logic, with 28 high current and high voltage DMOS outputs capable of sustaining a maximum of 40V. On system power up the output drivers are locked out using the chip enable function; two enable inputs are available for the different driver banks. BLOCK DIAGRAM (case of 4 bit)
PQFP44
PLCC44
An internal power-on system is implemented in order to avoid wrong output commutation during the supply voltage transients. Using a mask option during manufacturing allows a different decoding. Control of the energy delivered to the print head is made by means of a special circuitry. All driver outputs are capable of withstanding a contact discharge of 8kV with the IC biased.
May 1995
1/9
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
L6451
PLCC44 PIN CONNECTION (Top view)
PQFP44 PIN CONNECTION (Top view)
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L6451
ABSOLUTE MAXIMUM RATINGS
Symbol VOUT VCLAMP IOUT IPEAK TJ VDD VIN Tamb Tstg Output Voltage Output Clamping Voltage Output Continuous Current Output Peak Current (with duty cycle = 10% TON = 4s) Junction Temperature Logic Supply Voltage Input Voltage Range Operating Temperature Range Storage Temperature Range Parameter Value 40 40 0.8 2 150 7 -0.3V to VS +0.3 0 to 70 -55 to 150 Unit V V A A C V V C C
PIN FUNCTIONS
Name VDD GND OUT0 to OUT27 CLAMP 5V Logic Supply. Logic and Power Ground. DMOS Outputs. This pin has to be connected to the power supply voltage of the head resistors. Each of the output DMOS have their drain connected with the anode of a protection diode, all the cathodes of the protection diodes are connected to the clamp pin. In order to have the device supplied, the CLAMP pin needs to be connected to the power.. Decoder inputs. A low logic input on these pins enables the outputs selected by the decoder inputs. A logic high enable the chip. Function
INA, INB, INC, IND COM1, COM2 CHIP ENABLE
THERMAL DATA
Symbol Rth j-amb Parameter Thermal Resistance Junction-Ambient Max. PQFP44 55 (*) PLCC44 65 (*) Unit C/W
(*) device mounted on PCB.
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L6451
D.C. ELECTRICAL CHARACTERISTICS at Tamb = 25C, VDD = 5V, Vclamp = 18V (unless otherwise specified).
Symbol VDD VCLAMP VIL VIH ILL ILH IDD VOUT Parameter Logic Supply Voltage Clamping Voltage Low Level Input Voltage High Level Input Current Low Level Input Current High Level Input Current Logic Supply Current Output Saturation Voltage VIN = VIL VIN = VIH (Independent from the output conditions) Tj Tj Tj Tj 25 C D.C. 0.4A 25 C D.C. 0.5A 90 C D.C. 0.4A 90 C D.C. 0.5A 0.9 1.1 1.4 1.7 0.2 0.25 VDD -1.2 -200 10 5 Test Condition Min. 4.75 9 Typ. 5 Max. 5.25 38 1.2 Unit V V V V A A mA V V V V V V
VCE
Output saturation absolute voltage variation around the typ. values for extended temperature ranges
Tj = 25C to 90C D.C.: 0.4A Tj = 25C to 90C D.C.: 0.5A
RDS ON
2.2
A.C. ELECTRICAL CHARACTERISTICS at Tamb = 25C, VDD = 5V.
Symbol TS TH Ton Toff tr tf Twout PD Signal Name INA, INB, INC, IND Vs COMn INA, INB, INC, IND Vs COMn COM1,2,3,4 VS OUT 0 to N COM1,2,3,4 VS OUT 0 to N Parameter SET - UP Time HOLD Time TURN - ON Time TURN - OFF Time Rise Time Fall Time Output Pulse Width Maximum allowable variation of the output power transmitted by each driver to the resistive load Maximum allowable variation of the output power transmitted by each driver to the resistive load RL = 40 Vclamp = 18V Twin = 3.5s RL = 40 IOUT = 0.5A RL = 39 VCLAMP = 18V - 20 IOUT = 0.5A, RL = 39 Tj = 25 to 90C IOUT = 0.5A, RL = 39 Tj = 25 to 90C Test Condition Min. 30 0 150 150 100 100 Twin + 80 4 Typ. Max. Unit ns ns ns ns ns ns ns %
PD
ae4
%
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L6451
Figure 1: Timing Waveforms
OUTPUT SELECTION Decoder Truth Table
IND 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 INC 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 INB 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 INA (LSB) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUTS 0.27 1.26 2.25 3.24 4.23 5.22 6.21 7.20 8.19 9.18 10.17 11.16 12.15 13.14 ALL OFF ALL OFF
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L6451
Figure 2: Application Circuit
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics.
(c) 1993 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - United Kingdom - U.S.A.
6/9
L6451
PQFP44 (14 x 14) PACKAGE MECHANICAL DATA
DIM. MIN. A A1 A2 B C D D1 D3 e E E1 E3 L L1 K 0.65 16.95 13.90 0.25 2.55 0.35 0.13 16.95 13.90 17.20 14.00 10.00 1.00 17.20 14.00 10.00 0.80 1.60 0(min.), 7(max.) 0.95 0.025 17.45 14.10 0.667 0.547 2.80 3.05 0.50 0.23 17.45 14.10 mm TYP. MAX. 3.40 0.0098 0.100 0.0138 0.005 0.667 0.547 0.677 0.551 0.394 0.039 0.677 0.551 0.394 0.0315 0.063 0.0374 0.687 0.555 0.110 0.120 0.0197 0.009 0.687 0.555 MIN. inch TYP. MAX. 0.134
D D1 D3 A1
33 34 23 22
0.10mm .004 Seating Plane
A A2
E3
E1
B
44 1 11
12
E
B C L K
e L1
PQFP44
7/9
L6451
PLCC44 PACKAGE MECHANICAL DATA
DIM. MIN. A B C D d1 d2 E e e3 F F1 G M M1 1.16 1.14 14.99 1.27 12.7 0.46 0.71 0.101 0.046 0.045 17.4 16.51 3.65 4.2 2.59 0.68 16 0.590 0.050 0.500 0.018 0.028 0.004 mm TYP. MAX. 17.65 16.65 3.7 4.57 2.74 MIN. 0.685 0.650 0.144 0.165 0.102 0.027 0.630 inch TYP. MAX. 0.695 0.656 0.146 0.180 0.108
8/9
L6451
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1995 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A.
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